Verification and validation of the hardware/software boundary cannot reasonably be deferred until prototype bring-up in the lab, because software is so critical to the operation of today’s systems. Or, at least, verification teams do so at their own peril. I’m sure we’ve all heard the nightmare scenarios where, for example, a team discovered in the lab that the processor’s bus was connected to the design in reverse order, or the processor was unable to power up again from low-power mode.
Next time you start planning for SoC integration testing, consider how portable stimulus and a step-wise testing approach can benefit your verification process!
