Keysight Technologies, Inc. announced the Low-Power Double Data Rate 6 (LPDDR6) design and test solution, a complete design and test solution to support the next technology wave for memory systems. The solution significantly improves device and system validation, providing new test automation tools necessary for advancing AI, especially in mobile and edge devices.
The memory market is evolving due to the rising demand for high-performance computing, AI, and energy-efficient mobile applications. LPDDR6 significantly enhances performance and efficiency to support next-generation compute system requirements, making it a crucial upgrade for contemporary devices.
Test complexity has grown with the adoption of next-generation memory devices such as LPDDR6, HBM4, and GDDR7. These technologies demand advanced test methods to ensure reliability and performance, and reducing test times while maintaining accuracy is a constant challenge.
Keysight’s complete workflow solution consists of transmitter and receiver test applications and the Advanced Design System (ADS) Memory Designer workflow solution. The LPDDR6 test solution can be paired with Keysight EDA software and the Keysight Memory Designer bundle to achieve faster design confidence from simulation to verification and test. The LPDDR6 test automation solution is based on Keysight’s UXR oscilloscope and high-performance M8040A Bit Error Ratio Tester.
LPDDR6’s impact is expected to reach beyond mobile devices. The new memory standard’s combination of high performance and power efficiency makes it particularly suitable for AI and machine learning applications, high-speed digital computing, automotive systems, data centers, and other edge applications areas where the balance between processing power and energy consumption is crucial.
Key Benefits of Keysight’s LPDDR6 Test Solution:
Accelerate Time-to-Market with Advanced Transmitter Testing
- Reduce validation time with fully automated compliance testing and characterization
- Capture precise measurements quickly using industry-leading low-noise technology
- Debug design issues faster with streamlined data analysis tools
- Analyze device BER performance with extrapolated eye mask margin testing
- Achieve accurate signal measurements directly from BGA packages with specialized de-embedding capabilities
Optimize Device Performance with Comprehensive Receiver Testing
- Validate designs confidently using proven Bit Error Ratio testing methodology
- Pinpoint performance issues early by testing against multiple jitter, crosstalk, and noise scenarios
- Maximize signal integrity through detailed BER analysis and receiver equalization optimization
- Ensure high interoperability with both device and host controller validation
Deliver Next-Generation Memory Solutions
- Enable faster user experiences with higher data rates support
- Extend battery life and reduce power consumption in mobile and data center applications
- Build more reliable products with enhanced data integrity and system stability features
Dr. Joachim Peerlings, Vice President and General Manager, Network and Datacenter Solutions, Keysight, said: “As a leader in memory design and test solutions, Keysight continues to collaborate with JEDEC to develop the LPDDR6 standard. This new LPDDR6 standard is set to revolutionize the market, offering unprecedented speed, efficiency, and reliability, enabling the industry’s AI Edge rollout. As the deployment and use of next-generation memory devices are growing, Keysight has achieved a significant milestone in enabling faster time to market for LPDDR6 memory designs.”
The new receiver and transmitter solution will be shown to the public for the first time at DesignCon 2025, Jan 29-30, at booth number 1039 in Santa Clara, California.
