HomePress ReleaseTessolve and Intel Foundry Collaborate on Enablement for EMIB Advanced Packaging Technology

Tessolve and Intel Foundry Collaborate on Enablement for EMIB Advanced Packaging Technology

Tessolve, a leading global provider of semiconductor system and silicon solutions for next-generation products, today announced that they have collaborated with Intel Foundry to support package designs with Embedded Multi-die Interconnect Bridge (EMIB), an advanced packaging technology essential for heterogeneous integrated multi-chip(let) architectures.

This collaboration enables Tessolve to support Intel Foundry customers globally. Tessolve has collaborated with Intel Foundry, supporting package design and completing a project end-to-end which includes package design and simulations. This allowed Tessolve to not only gain knowledge of the technology but also helped accelerate the qualification process.

“Over the past two decades, Tessolve has grown into a trusted engineering partner for many of the world’s leading semiconductor companies.”, said Srini Chinamilli, Co-Founder & CEO, Tessolve. “Intel Foundry’s EMIB, combined with our end-to-end capabilities across the semiconductor value chain, allows us to further expand our offerings for Intel Foundry customers.”

“Tessolve has already built deep capabilities over the past two decades, from chip architecture, design, test development and embedded systems”, said Vic Vadi, VP – Ecosystem, Foundry Services, Intel Corporation. “With this collaboration for enablement on our EMIB, we aim to combine Tessolve’s expertise with our advanced package design and test technology to provide our customers with end-to-end solutions to swiftly navigate the complexities of modern electronics design.”

EMIB is an advanced die-to-die connectivity technology developed by Intel and helps achieve low pitch bump with High Bandwidth Memory (HBM) integration and Universal Chiplet Interconnect Express (UCIe) interface compatibility. To meet the performance demands of next-gen semiconductor applications, open standards like UCIe help define interconnect protocols for chiplets. The collaboration aims to reduce development costs, mitigate risk, and accelerate innovation in semiconductor design.

As a leading engineering services player in the US$550 billion semiconductor market, Tessolve has made significant investments to build 11 semiconductor test and embedded labs across the globe to help enable a comprehensive solution offering to its clients. The company in September 2025 secured $150 million in funding from TPG, towards strengthening its global delivery centers, expanding advanced test labs and accelerating strategic acquisitions to consolidate its position as a key enabler to the global and Indian semiconductor ecosystem.

ELE Times Research Desk
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