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Single-Chip Security Solutions Offer Simple Implementation While Safeguarding Sensitive IoT Data

Designers of internet of things (IoT) devices now have a smarter and more secure way to protect stored, sensitive information with the highly integrated MAX36010 and MAX36011 single-chip security supervisors from Maxim Integrated Products. These security solutions make it easier for designers to implement robust tamper detection, cryptography and secure storage while safeguarding sensitive information via logical and physical protections, without having to be security experts themselves.

The MAX36010 and MAX36011 both offer strong security that can be easily integrated into a design at any stage of its development. Additionally, if these parts are integrated later in the design cycle, there is no need to change the platform to accommodate them, thereby simplifying the implementation process. Compared to competitive solutions, the devices, due to their high level of integration, facilitate a 60 percent faster design cycle, while also lowering bill of materials (BOM) costs by 20 percent. To ensure a higher level of security, these supervisors generate keys via a true random number generator (TRNG). The keys are then stored in battery-backed RAM along with certificates and other sensitive data. This data is erased when tampering is detected, a capability that meets the requirements of Federal Information Processing Standard (FIPS) Publication 140-2 at its highest security levels (Levels 3 and 4).

The MAX36010 and MAX36011 both support symmetric and asymmetric cryptographic functions such as Data Encryption Standard (3DES), Advanced Encryption Standartd (AES), Rivest–Shamir–Adleman (RSA) and Elliptic Curve Digital Signature Algorithm (ECDSA). These secure cryptographic engines are designed and compliant to the requirements of Payment Card Industry (PCI) and FIPS140-2 certifications. The MAX36010 supports symmetric key generation for AES and 3DES, whereas the MAX36011 supports both symmetric and asymmetric key generations for AES, 3DES, RSA and ECDSA.

Key Advantages

  • Highly integrated: Enables 60 percent faster design cycle and 20 percent lower BOM costs versus the closest competitive solution
    • Includes temperature and voltage sensors, 1Kbyte of secure storage, dynamic tamper sensors, real-time clock (RTC), and TRNG—eliminating the need to use multiple discrete components
    • Integrates multiple cryptographic functions including AES, DES, RSA, ECDSA and Secure Hash Algorithm (SHA) hardware engine
    • Host interfaces include SPI, Universal Asynchronous Receiver/Transmitter (UART) and I2C; no firmware development is required to connect to the host processor
  • Robust hardware security: Battery-backed RAM provides storage for sensitive information. Dynamic tamper sensors detect hacking incidents and immediately delete sensitive information
  • Ultra-low power: Offers 70 percent lower battery current consumption compared to the closest competitive solution, which extends end product battery life
ELE Times Research Desk
ELE Times Research Deskhttps://www.eletimes.ai
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