HomeElectronicsIEEE IEDM, 2025 Showcases Latest Technologies in Microelectronics, Themed “100 Years of...

    IEEE IEDM, 2025 Showcases Latest Technologies in Microelectronics, Themed “100 Years of FETs”

    The IEEE International Electron Devices Meeting (IEDM) is considered the premier forum where scientists and engineers come together to disclose, discuss, and debate the best recent R&D work in electron devices, semiconductors, and microelectronic technologies. The 71st annual IEEE IEDM conference will be held December 6-10, 2025, at the Hilton San Francisco Union.

    Supporting the theme 100 Years of FETs: Shaping the Future of Device Innovations, the 2025 IEDM technical program will consist of 295 presentations, plus a host of events.

    “This year’s IEDM offers a preview of the next computing paradigm. We are witnessing the convergence of atomic-scale fabrication, 3D integration, and neuromorphic design, moving us beyond yesterday’s technology and even classical computing. From monolithic CFETs that redefine transistor density to in-memory computing that can mitigate the von Neumann bottleneck, more intelligent and more efficient technology is being built here,” said Gaudenzio Meneghesso, IEDM 2025 Publicity Chair, and Head of the Department of Information Engineering at the University of Padova.

    “As AI is demanding unprecedented efficiency, the device community is rising to the challenge. IEDM 2025 showcases technologies that can power the next AI decade: from GaN chiplets for power delivery and silicon photonics for data transfer to 3D DRAM and FeFETs for in-memory computing. These device technologies will make the algorithms of tomorrow possible.”

    “The pursuit of Moore’s Law has evolved from a simple race to shrink transistors into engineering in multiple dimensions. IEDM 2025 showcases this new era: we are scaling up with 3D stacking like CFETs and 3D DRAM, scaling laterally with atomic-layer-deposited channel materials, and scaling past CPUs with novel architectures like in-memory computing,” said John Paul Strachan, IEDM 2025 Publicity Co-Chair, Director of Peter Grünberg Institute, Forschungszentrum Jülich, and Professor at RWTH Aachen University. “This is the culmination of a century of FET innovation, pushing the boundaries of what is physically possible to compute.”

    Related News

    Must Read

    Fluentgrid Completes Wirepas Certified HES Integration, Joining The Growing Ecosystem For Smart Electricity Metering

    Fluentgrid Ltd., a leading provider of utility digitalisation platforms...

    Cadence Reinforces Long-Term R&D Commitment, Celebrating 20 years in Pune

    Cadence, a global leader in electronic system design, celebrated...

    Redefining Edge Computing: How the STM32V8 18nm Node Outperforms Legacy 40nm MCUs

    STMicroelectronics held a virtual media briefing, hosted by Patrick...

    NVIDIA’s Jetson T4000 for Lightweight & Stable Edge AI Unveiled by EDOM

    EDOM Technology announced the introduction of the NVIDIA Jetson...

    Anritsu to Bring the Future of Electrification Testing at CES 2026

    Anritsu Corporation will exhibit Battery Cycler and Emulation Test...

    Keysight’s Software Solution for Reliable AI Deployment in Safety-Critical Environments

    Keysight Technologies, Inc. introduced Keysight AI Software Integrity Builder, a...

    Molecular Beam Epitaxy (MBE) Growth of GaAs-Based Devices

    Courtesy: Orbit & Skyline In the semiconductor ecosystem, we are...

    Don’t Let Your RTL Designs Get Bugged!

    Courtesy: Cadence Are you still relying solely on simulation to...