Strengthening Microchip Technology’s data center solutions portfolio, the retimers support high-bandwidth architectures while helping reduce integration complexity
As AI workloads continue to scale, the data center architects show limitations by signal reach and rising latency, leaving valuable memory resources underutilized across large GPU clusters. These challenges boost as interconnect speeds increase. At 64 GT/s (giga transfers per second), signal integrity limitations can restrict system scale and burden server architectures. In response, Microchip Technology releases XpressConnect PCIe 6.0 and CXL 3.1 retimers to enable memory expansion and resource disaggregation in large-scale AI fabrics.
The retimers extend signal reach beyond conventional PCIe Gen 5 and Gen 6 electrical limits, enabling more flexible system designs across complex baseboards, riser cards, and cabled interconnects. The retimers are engineered to help address these challenges by enabling higher-bandwidth connectivity while supporting the stringent thermal requirements of modern AI fabrics that require power budgets. XpressConnect retimers achieve a pin-to-pin latency of less than 12 ns, approximately 80% lower than PCIe 6.0 specifications. This low-latency performance helps improve utilization of AI accelerators and GPUs by reducing data stalls in high-density AI clusters.
“AI data centers are increasingly constrained not by compute, but by the ability to move data efficiently across the system. As PCIe 6.0 pushes speeds to 64 GT/s, signal reach and latency become critical design challenges,” said Brian McCarson, corporate vice president and GM of Microchip’s data center solutions business unit.
Our XpressConnect retimers are designed to act as the high‑performance nerve center of the AI server, helping customers build more scalable, power‑efficient fabrics by reducing latency and improving connectivity across dense GPU clusters. This system‑level approach allows data center architects to reclaim underutilized resources and improve overall platform efficiency at scale.
The XpressConnect retimers round out Microchip’s data center portfolio and are engineered to work alongside the company’s 3-nm Switchtec PCIe Gen 6 switches, Adaptec SmartRAID controllers and Host Bus Adapters (HBAs), and Flashtec NVMe controllers, helping enable a pre-validated, interoperable fabric. Microchip’s XpressConnect PCIe Gen 6 and CXL 3.1 retimers can integrate with PCIe Gen 3, Gen 4, and Gen 5 platforms as required, helping reduce time to market. The retimers also connect into Microchip’s ChipLink diagnostic ecosystem, delivering a unified graphical user interface for real-time 2D eye capture and four-level pulse amplitude modulation (PAM4) telemetry. These capabilities help data center operators monitor link health more effectively and simplify troubleshooting, which can help reduce the total cost of ownership.
Engineered as an industry-standard, drop-in solution, XpressConnect retimers are designed to help reduce the risk of single-vendor dependency for hyperscalers. Additionally, the devices support flexible link bifurcation configurations (1×16, 2×8, and 4×4) and align with widely adopted retimer footprint guidelines, while providing enterprise-class features such as hot-plug support and end-to-end data integrity. Visit the website to learn more about Microchip Technology’s data center solutions for high-performance compute, storage, and connectivity.
Development Tools
Microchip’s ChipLink diagnostic tools offer comprehensive debug, diagnostics, configuration, and analysis through an intuitive graphical user interface (GUI). ChipLink connects via in-band PCIe or sideband signals such as UART, TWI, and EJTAG, enabling flexible, efficient monitoring and troubleshooting throughout design and deployment.
