HomeNewsPunjab Engineering College and Cadence Sign MOU for VLSI Training

    Punjab Engineering College and Cadence Sign MOU for VLSI Training

    Multi-year collaboration will strengthen workforce development and support India’s need for semiconductor engineers

    Punjab Engineering College (Deemed to be University) and Cadence Design Systems (India) Pvt Ltd, a fully owned subsidiary of Cadence Design Systems, Inc, have today entered into a Memorandum of Understanding (MoU), marking the beginning of a long-term partnership.

    This strategic partnership signifies a major leap forward in providing world-class education and hands-on experience collaboratively in Cadence’s cutting-edge computational software technology through the newly started Bachelor of Technology (B.Tech) program in Electronics Engineering (VLSI Design and Technology).

    The MoU was signed by the director of Punjab Engineering College (PEC), Prof. Baldev Setia, and Mr. Vijayakumar C Patil, Application Engineering Group Director, Cadence, in the presence of the head of the Electronics and Communication Engineering (ECE) Department, Prof. Arun Kr. Singh, BTech VLSI coordinator Dr. Jyoti Kedia, and other faculty members of ECE Department.

    Through this collaboration, PEC and Cadence aim to work together to enhance, improve, and extend the knowledge, capabilities, and expertise of the ecosystem in general and the students of PEC in particular. The key features of this collaboration are close alignment of the PEC curriculum towards industry-relevant challenges, new opportunities of internships to provide industry experience to PEC students during their studies and placements, and access to Cadence’s award-winning online training content.

    The director of PEC, Prof. Baldev Setia, expressed enthusiasm about this new partnership, saying, “This collaboration will bridge the gap between academia and industry, ensuring that our graduates are well-prepared to meet the challenges of the ever-evolving semiconductor landscape.”

    Right-Director of PEC, Prof. Baldev Setia, Left-Mr.Vijayakumar C Patil, Group Director, Application Engineering, System design and Analysis,Cadence
    Right-Director of PEC, Prof. Baldev Setia, Left-Mr.Vijayakumar C Patil, Group Director, Application Engineering, System design and Analysis,Cadence

    Jaswinder Ahuja, corporate vice president and India managing director, Cadence, said, “Cadence has been closely involved in workforce development in India for the last 25 years. According to an article in the Economic Times, a report by the Semicon India Future Skills Talent Committee set up in August 2022 says that India will need 12 lakh workers in semiconductor-related industries by 2032. Initiatives such as this one will help train students in real-life projects and make them industry-ready. We are proud to collaborate with PEC for this MOU.”

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