The 30th International Symposium on VLSI Design and Test (VDAT 2026) was inaugurated today at Jaypee Institute of Information Technology (HIT), Noida, bringing together eminent academicians, semiconductor industry leaders, researchers, policymakers and students to deliberate on emerging technologies shaping the future of semiconductor and intelligent computing systems. The three-day symposium is being held from 20-22 August 2026 with the theme “Advancing Intelligent, Secure and Quantum-Ready Semiconductor Systems for the Next Era of Computing.”
The landmark edition is being hosted by JIIT in collaboration with Delhi Technological University (DTU), Indraprastha Institute of Information Technology Delhi (HIT-Delhi), Indira Gandhi Delhi Technical University for Women (IGDTUW), National Institute of Technology Delhi (NIT Delhi) and Netaji Subhas University of Technology (NSUT), with the support of the VLSI Society of India (VSI) and IEEE Uttar Pradesh Section. VDAT has been a flagship platform of VSI for three decades, connecting researchers, academia and industry in VLSI design, semiconductor technologies, testing, EDA, embedded systems and emerging computing technologies.
Bringing The Industry and Academia Together
The 30th edition is particularly significant as VDAT is being organized in Uttar Pradesh for the first time in its history. Its presence in Noida reflects the growing importance of the Noida—Greater Noida region in India’s electronics, semiconductor, data-centre and advanced-manufacturing landscape, while providing a platform to connect the state’s emerging priorities in electronics manufacturing, semiconductor investment, innovation and high-technology employment with leading researchers and industry.
The inaugural ceremony was graced by Ms. Sunita Verma, Scientist-G and Group Coordinator, R&D Dix4sion, Ministry of Electronics and Information Technology (MeitY), Government of India, as the Chief Guest, and Dr. Kamaljeet Singh, Director General, Semi-Conductor Laboratory (SCL), Mohali, as the Guest of Honour. The ceremony also witnessed the presence of Prof. S. C. Saxena, Pro-Chancellor, HIT; Prof. Shweta Srix’astava, Director, HIT and General Chair, VDAT 2026; Dr. Satya Gupta, President, VLSI Society of India; Chitra Hariharan, Secretary, VLSI Society of India; Prof. Prateek Sharma, Vice Chancellor, DTU; and Prof. Ranjana Jha, Vice-Chancellor, IGDTUW, among other distinguished guests.
In her address, Ms. Sunita Verma emphasised the strategic importance of India’s semiconductor journey and the need to strengthen capabilities across chip design, fabrication, advanced packaging, testing, materials, equipment and intellectual property. She highlighted the growing significance of Al, edge computing, hardware security, heterogeneous integration, chiplets, silicon photonics and quantum technologies, and stressed collaboration among government, academia, industry, start ups and research institutions.
Dr. Kamaljeet Singh emphasised the strategic importance of strengthening India’s indigenous semiconductor capabilities and developing a robust ecosystem spanning research, design, fabrication and technology deployment. He highlighted stronger academia—industry—government collaboration an essential to accelerating semiconductor innovation and supporting India’s strategic and emerging technology requirements.
Dr. Satya Gupta, President, VLSI Society of India, highlighted that continued evolution of VDAT us a platform for leading researchers, industry experts and students to exchange innovations in VLSI design, semiconductor technologies, testing and system design, 8iid emphasised the relevance of the 2G26 theme to AI, sect hardware, heterogeneous integration and quantum computing.
Decoding the Intricacies of The Electronics Universe
The inaugural programme featured addresses by Prof. S. C. Saxena, Dr. Satya’ Gupta and Chitra Hariharan, Dr. Kamaljeet Singh, Ms. Sunita Verma and Mr. Hitesh Garg, Vice President and India Managing Director, NXP Semiconductors. It also featured the Synopsys—JIIT Tapeout Initiative, presented by Mr. Amit Khanuja, VP—RD Engineering, IP Group, Synopsys, the unveiling of the VDAT 2026 Proceedings, and inauguration of the Cadence-Certified Laboratory by Ms. Tal Zigman, Global Academic Network, Cadence Design Systems.
The symposium received 441 research papers from 78 institutions, of which 122 papers were accepted, representing an acceptance rate of 27.7%. The research programme covers seven technical tracks addressing contemporary areas of VLSI and semiconductor technology, including circuits and SoC design, embedded systems, AI hardware and design automation, emerging semiconductor devices, advanced integration, hardware security, advanced memory architectures and quantum ready technologies.
The three-day programme also includes keynote addresses, invited talks, tutorials, a PhD Forum, Startup/Chippreneur activities, poster sessions and industry—academia interactions, providing opportunities for researchers and young technology professionals to engage with experts from leading organisations including NXP Semiconductors, Cadence, Synopsys, STMicroelectronics and Renesas.
The symposium marks an important milestone for HIT Noida and the Delhi-NCR academic consortium, providing a platform to showcase the region’s academic and technological capabilities and strengthen connections with India’s growing semiconductor and electronics ecosystem. The organisers expressed their appreciation to the distinguished speakers, participating institutions, industry partners, researchers, reviewers, students and volunteers for their contribution to the successful organisation of VDAT 2026.
