HomeTechnologyHigh Performance ComputingHigh-Performance Computers could advance application of 3D Holography

    High-Performance Computers could advance application of 3D Holography

    Researchers at Chiba University are developing a computer that can project high-quality 3D electroholography as a video, a project that they began about 25 years ago. The team, led by professor Tomoyoshi Ito, has been working to increase the speed of the holographic projections by developing new high-performance hardware.

    The original computation system for electroholography, named HOlographic ReconstructioN (HORN), was developed in 1993. The latest version of HORN, HORN-8, was developed using field programmable gate array (FPGA) technology.

    Initially, a circuit for amplitude-type electroholography was implemented in HORN-8. However, to realize a photorealistic 3D image with the HORN system, the researchers needed to implement a phase-type computer-generated hologram (CGH) in HORN-8. A new version of HORN-8 and its cluster system was developed.

    A calculation method for adjusting the phase of light was also implemented in the latest phase-type HORN-8. Eight chips were mounted on the FPGA board to avoid bottlenecks that, along with the calculation method, could affect the processing speed. With this approach, HORN-8 was able to increase the computing speed in proportion to the number of chips, which allowed it to project video holography more clearly.

    Using the phase-type HORN-8, the researchers demonstrated the ability to project holography information as a 3D video with high-quality images. The HORN-8 was able to reconstruct 3D videos composed of tens of thousands of point-light sources (PLSs) in video rate. It achieved a real-time reconstruction of a 3D movie with point clouds composed of 32,000 points. The team believes that this rate could be realized in interactive systems such as TVs and telephones.

    The performance of HORN-8 is approximately the same as the latest GPU; however, because the FPGAs mounted on the HORN-8 are not the newest type, its performance could be significantly improved when the latest model FPGAs are used, the researchers said.

    To make a 3D object from 2D data, several factors must be considered, including the binocular parallax, motion parallax, convergence angle, and focus adjustment. Currently, most 3D TVs use the binocular parallax for the stereoscopy function.

    Takashi Nishitsuji, a former student of Ito’s lab and now assistant professor at Tokyo Metropolitan University, said, “HORN-8 is the fruit of many people’s wisdom, skills, and efforts. We want to continue the research of HORN and try other methods from various perspectives for its practical application.”

    ELE Times Research Desk
    ELE Times Research Deskhttps://www.eletimes.ai
    ELE Times provides a comprehensive global coverage of Electronics, Technology and the Market. In addition to providing in depth articles, ELE Times attracts the industry’s largest, qualified and highly engaged audiences, who appreciate our timely, relevant content and popular formats. ELE Times helps you build awareness, drive traffic, communicate your offerings to right audience, generate leads and sell your products better.

    1 COMMENT

    LEAVE A REPLY

    Please enter your comment!
    Please enter your name here

    Related News

    Must Read

    TI’s new power-management solutions enable scalable AI infrastructures

    Texas Instruments (TI) debuted new design resources and power-management...

    ESA awards Rohde & Schwarz for contributions to 30 years European Satellite Navigation

    The event brought together institutional and industrial partners, ESA...

    STMicroelectronics joins FiRa board, strengthening commitment to UWB ecosystem and automotive Digital Key adoption

    STMicroelectronics, a global semiconductor leader serving customers across the...

    STARLight Project chosen as the European consortium to lead in next-gen silicon photonics on 300 mm wafers

    The STARLight project is bringing together a consortium of leading...

    KYOCERA AVX RELEASES NEW KGP SERIES STACKED CAPACITORS

    KYOCERA AVX released the new KGP Series commercial-grade stacked...

    Microchip Unveils First 3 nm PCIe Gen 6 Switch to Power Modern AI Infrastructure

    Switchtec Gen 6 PCIe Fanout Switches deliver extra bandwidth,...

    Nuvoton Launches Arbel NPCM8mnx System-in-Package (SiP) for AI Servers and Datacenter Infrastructure

    Breakthrough BMC Innovation Powers Secure, Scalable, and Open Compute...

    NEPCON ASIA 2025: Showcasing the Future of Smart Electronics Manufacturing

    NEPCON ASIA 2025, taking place from October 28 to...

    Renesas Expands Sensing Portfolio with 3 Magnet-Free IPS ICs & Web-Based Design Tool

    New Simulation & Optimization Platform Enables Custom Coil Designs...

    IEEE IEDM, 2025 Showcases Latest Technologies in Microelectronics, Themed “100 Years of FETs”

    The IEEE International Electron Devices Meeting (IEDM) is considered...