HomeElectronicsBuilding Large Superconducting Chips

    Building Large Superconducting Chips

    Clock distribution networks, also referred to as clock trees, are techniques for distributing clock signals (from a common source) to all the electrical components in a system, ensuring that all elements in a circuit operate in a synchronized fashion. These networks could be central to the development of very-large-scale integration (VLSI) systems, and integrated circuits (ICs) that combine thousands of logic gates or devices into a single chip.

    Researchers at Northrop Grumman Mission Systems have recently developed a promising clock distribution network based on a superconducting metamaterial design that could enable the fabrication of better performing, large superconducting ICs.

    The idea of logic circuits based on superconductors was first introduced in the 1980s. Since then, many studies have highlighted their potential as tools to perform logic computations at high speeds using low computational power.

    Despite their promise and advantages, so far developing highly performing superconducting logic circuits has proved to be challenging. The main reason for this is that the methods used to supply power to these circuits were often ineffective, impairing their performance.

    “Early superconducting logic families powered devices with DC current through resistors, which obviously burned a lot of power,” Joshua A. Strong, one of the researchers who carried out the study. “More recent designs power devices with an AC current through a transformer. That burns a lot less power, but then the problem becomes: how do you drive thousands, or millions of transformers at GHz frequencies, each with the same amplitude and phase? It’s kind of like trying to build the U.S. power grid on a 5 millimeter chip.”

    The key goal of the study by Strong and his colleagues was to devise a network that would allow a flat, uniform, and standing wave to spread across their superconducting IC. They knew that this would be difficult; as in nature, waves do not generally behave like this (i.e., they are not flat, but are more “wavey”).

    “If you think of a guitar string, it has a first-order resonance where the ends are fixed and the middle oscillates, so you have a half-wave vibrating on the string,” Strong said. “It also has second, third, or higher-order resonances that oscillate at higher harmonics with 2 or 3 or more half-waves on the string. You could say that a guitar string also has a zeroth-order mode with zero half-waves, meaning the string is flat, but that’s kind of a boring case because it happens at 0 Hz, which just means the string isn’t vibrating at all.”

    In metamaterials, physicists have observed far more interesting zeroth-order resonances than those of the oscillating guitar string, as outlined by Strong. For instance, they can produce flat waves that oscillate at a non-zero frequency, which is exactly what the researchers wanted to achieve with their clock distribution network.

    Using their resonant metamaterial-based clock distribution network, Strong and his colleagues performed S-parameter measurements for a 10 GHz IC design and validated a digital reciprocal quantum logic circuit with 48,0000 junctions, operating at 3.5 GHz. Remarkably, they found that their network could enable the uniform distribution of power with a variation below 1 dB across a 3×3 mm2 active chip area, with a power efficiency of approximately 30%.

    “My colleagues and I showed that we can deliver uniform power to thousands of transformers across a chip,” Strong added. “That’s exciting because it means we have the clock network we need to build large superconducting integrated circuits. We now plan to work on developing bigger and better logic circuits with lower power than semiconductor circuits.”

    ELE Times Research Desk
    ELE Times Research Deskhttps://www.eletimes.ai
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