HomeTechnologyHigh Performance ComputingXcelium Distributed Simulation Delivers Up to 3× Faster Multi-Die Verification

    Xcelium Distributed Simulation Delivers Up to 3× Faster Multi-Die Verification

    As multi-die and chiplet-based systems gain traction in AI, mobile, automotive, and high-performance computing, traditional simulation methods are hitting performance limits. To address this challenge, Cadence has introduced the Xcelium Distributed Simulation App, designed to accelerate verification workflows and cut down bottlenecks. With speedups of up to 3×, the new solution helps design teams handle complex multi-die systems more efficiently and cost-effectively.

    The Xcelium Distributed Simulation App, available within the Xcelium Logic Simulator, partitions large simulations into smaller, independent tasks that can run in parallel across server resources. This distributed approach eliminates the long runtimes associated with monolithic simulations, enabling teams to achieve faster turnaround times without compromising accuracy.

    Key advantages include:

    • Up to 3× faster performance in multi-die system simulations.
    • Improved hardware efficiency, reducing compute costs by as much as 5×.
    • Seamless testbench reuse, so teams can extend single-die verification environments to multi-die projects with minimal overhead.

    Early adopters are already seeing results. At Samsung Semiconductor, Garima Srivastava’s verification team reports smoother workflows and faster execution by leveraging existing testbenches for multi-die designs.

    Alok Jain, Corporate VP of R&D at Cadence, emphasized the impact:

    “With the Xcelium Distributed Simulation App, we are redefining verification performance for multi-die systems. It’s about giving our customers the speed and scalability they need to meet next-generation design demands.”

    This new capability reinforces Cadence’s leadership in advanced verification, helping customers stay ahead as the industry shifts to larger, more complex architectures.

    (This article has been adapted and modified from content on Cadence Design Systems.)

    Related News

    Must Read

    Keysight Launches Local Manufacturing in India to Accelerate Global Innovation

    Keysight Technologies has announced plans to begin local manufacturing...

    Microchip Introduces Automotive-Qualified System-in-Package Hybrid MCU for Automotive and E-Mobility Human-Machine Interface Applications

    Automotive and E-Mobility designers are incorporating more Human-Machine Interfaces...

    Cadence and NVIDIA Collaborate on Accelerated Engineering Solutions for Agentic AI Chip and System Design​

    Cadence announced an expansion of its broad collaboration with NVIDIA to accelerate...

    TI unveils high-performance isolated power modules to advance power density in data centers and EVs

    Texas Instruments (TI) has unveiled new isolated power modules,...

    STMicroelectronics Unveils AI-Enabled ‘Stellar P3E’ MCU, Backs 28nm Strategy for Cost and Supply Chain Stability

    By Shreya Bansal, Sub-Editor STMicroelectronics introduced the Stellar P3E, a...

    R&S amplifiers enable high-field immunity testing expansion at IB Lenhardt Lab

    IBL Lab GmbH, the DAkkS (Deutsche Akkreditierungsstelle GmbH) accredited...

    Renesas Launches First Bidirectional 650V-Class GaN Switch For Multiple Uses

    Renesas Electronics Corporation, a premier supplier of advanced semiconductor...

    Microchip Announces New BZPACK mSiC Power Modules with HV-H3TRB Reliability Standards

    Microchip Technology has announced its BZPACK mSiC power modules,...